Bio


Christos Kozyrakis research focuses on making computer system of any size faster, cheaper, and greener. His current work focuses on the hardware architecture, runtime environment, programming models, and security infrastructure for warehouse-scale data centers and many-core chips with thousands of general purpose cores and fixed functions accelerators.

Academic Appointments


Honors & Awards


  • Research Grant, Okawa Foundation (2005)
  • Career Award, National Science Foundation (2006)
  • Faculty Award, IBM (2006)

Boards, Advisory Committees, Professional Organizations


  • Willard R. and Inez Kerr Bell faculty scholar, Stanford University (2009 - 2011)

Professional Education


  • PhD, University of California at Berkeley, Computer Science (2002)

2014-15 Courses


Journal Articles


  • QUALITY-OF-SERVICE-AWARE SCHEDULING IN HETEROGENEOUS DATACENTERS WITH PARAGON IEEE MICRO Delimitrou, C., Kozyrakis, C. 2014; 34 (3): 17-30
  • QoS-Aware Scheduling in Heterogeneous Datacenters with Paragon ACM TRANSACTIONS ON COMPUTER SYSTEMS Delimitrou, C., Kozyrakis, C. 2013; 31 (4)

    View details for DOI 10.1145/2556583

    View details for Web of Science ID 000329130800004

  • Paragon: QoS-Aware Scheduling for Heterogeneous Datacenters ACM SIGPLAN NOTICES Delimitrou, C., Kozyrakis, C. 2013; 48 (4): 77-88
  • Guest Editors' Introduction SELECTED RESEARCH FROM HOT CHIPS 24 IEEE MICRO Kozyrakis, C., Zahir, R. 2013; 33 (2): 6-7
  • Measuring and analyzing the energy use of enterprise computing systems Sustainable Computing: Informatics and Systems Kazandjieva, M., Heller, B., Gnawali, O., Levis, P., Kozyrakis, C. 2013
  • QoS-Aware Scheduling in Heterogeneous Datacenters with Paragon ACM Transactions on Computer Systems (TOCS) Delimitrou, C., Kozyrakis, C. 2013; 31 (4)
  • The Netflix Challenge: Datacenter Edition IEEE COMPUTER ARCHITECTURE LETTERS Delimitrou, C., Kozyrakis, C. 2013; 12 (1): 29-32
  • Decoupling Datacenter Storage Studies from Access to Large-Scale Applications IEEE COMPUTER ARCHITECTURE LETTERS Delimitrou, C., Sankar, S., Vaid, K., Kozyrakis, C. 2012; 11 (2): 53-56
  • SCALABLE AND EFFICIENT FINE-GRAINED CACHE PARTITIONING WITH VANTAGE IEEE MICRO Sanchez, D., Kozyrakis, C. 2012; 32 (3): 26-37
  • Hardware Acceleration of Transactional Memory on Commodity Systems ACM SIGPLAN NOTICES Casper, J., Oguntebi, T., Hong, S., Bronson, N. G., Kozyrakis, C., Olukotun, K. 2012; 47 (4): 27-38
  • Improving System Energy Efficiency with Memory Rank Subsetting ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION Ahn, J. H., Jouppi, N. P., Kozyrakis, C., Leverich, J., Schreiber, R. S. 2012; 9 (1)
  • Towards Energy-Proportional Datacenter Memory with Mobile DRAM 2012 39TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA) Malladi, K. T., Nothaft, F. A., Periyathambi, K., Lee, B. C., Kozyrakis, C., Horowitz, M. 2012: 37-48
  • A Case of System-level Hardware/Software Co-design and Co-verification of a Commodity Multi-Processor System with Custom Hardware CODES+ISSS'12:PROCEEDINGS OF THE TENTH ACM INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE-CODESIGN AND SYSTEM SYNTHESIS Hong, S., Oguntebi, T., Casper, J., Bronson, N., Kozyrakis, C., Olukotun, K. 2012: 513-519
  • SCD: A Scalable Coherence Directory with Flexible Sharer Set Encoding 2012 IEEE 18TH INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA) Sanchez, D., Kozyrakis, C. 2012: 129-140
  • Green Enterprise Computing Data: Assumptions and Realities 2012 INTERNATIONAL GREEN COMPUTING CONFERENCE (IGCC) Kazandjieva, M., Heller, B., Gnawali, O., Levis, P., Kozyrakis, C. 2012
  • Understanding Sources of Inefficiency in General-Purpose Chips COMMUNICATIONS OF THE ACM Hameed, R., Qadeer, W., Wachs, M., Azizi, O., Solomatnikov, A., Lee, B. C., Richardson, S., Kozyrakis, C., Horowitz, M. 2011; 54 (10): 85-93
  • The Case for RAMCloud COMMUNICATIONS OF THE ACM Ousterhout, J., Agrawal, P., Erickson, D., Kozyrakis, C., Leverich, J., Mazieres, D., Mitra, S., Narayanan, A., Ongaro, D., Parulkar, G., Rosenblum, M., Rumble, S. M., Stratmann, E., Stutsman, R. 2011; 54 (7): 121-130
  • Decoupling Datacenter Studies from Access to Large-Scale Applications: A Modeling Approach for Storage Workloads 2011 IEEE INTERNATIONAL SYMPOSIUM ON WORKLOAD CHARACTERIZATION (IISWC) Delimitrou, C., Sankar, S., Vaid, K., Kozyrakis, C. 2011: 51-60
  • Understanding Sources of Inefficiency in General-Purpose Chips Communications of the ACM (CACM) Hameed, R., Qadeer, W., Wachs, M., Azizi, O., Solomatnikov, A., Lee, Benjamin, C., Kozyrakis, C. 2011; 54 (10)
  • Vantage: Scalable and Efficient Fine-Grain Cache Partitioning ISCA 2011: PROCEEDINGS OF THE 38TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE Sanchez, D., Kozyrakis, C. 2011: 57-68
  • Hardware Acceleration of Transactional Memory on Commodity Systems ASPLOS XVI: SIXTEENTH INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS Casper, J., Oguntebi, T., Hong, S., Bronson, N. G., Kozyrakis, C., Olukotun, K. 2011: 27-38
  • SERVER ENGINEERING INSIGHTS FOR LARGE-SCALE ONLINE SERVICES IEEE MICRO Kozyrakis, C., Kansal, A., Sankar, S., Vaid, K. 2010; 30 (4): 8-19
  • An Analysis of On-Chip Interconnection Networks for Large-Scale Chip Multiprocessors ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION Sanchez, D., Michelogiannakis, G., Kozyrakis, C. 2010; 7 (1)
  • Flexible Architectural Support for Fine-Grain Scheduling ACM SIGPLAN NOTICES Sanchez, D., Yoo, R. M., Kozyrakis, C. 2010; 45 (3): 311-322
  • Understanding Sources of Inefficiency in General-Purpose Chips ISCA 2010: THE 37TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE Hameed, R., Qadeer, W., Wachs, M., Azizi, O., Solomatnikov, A., Lee, B. C., Richardson, S., Kozyrakis, C., Horowitz, M. 2010: 37-47
  • Tainting is Not Pointless ACM SIGOPS Operating Systems Review Dalton, M., Kannan, H., Kozyrakis, C. 2010; 44 (2)
  • Implementing and Evaluating Nested Parallel Transactions in Software Transactional Memory SPAA '10: PROCEEDINGS OF THE TWENTY-SECOND ANNUAL SYMPOSIUM ON PARALLELISM IN ALGORITHMS AND ARCHITECTURES Baek, W., Bronson, N., Kozyrakis, C., Olukotun, K. 2010: 253-262
  • Power Management of Datacenter Workloads Using Per-Core Power Gating IEEE COMPUTER ARCHITECTURE LETTERS Leverich, J., Monchiero, M., Talwar, V., Ranganathan, P., Kozyrakis, C. 2009; 8 (2): 48-51
  • HOT CHIPS TURNS 20 IEEE MICRO Kozyrakis, C., van de Waerdt, J. 2009; 29 (2): 4-5
  • A Memory System Design Framework: Creating Smart Memories ISCA 2009: 36TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE Firoozshahian, A., Solomatnikov, A., Shacham, O., Asgar, Z., Richardson, S., Kozyrakis, C., Horowitz, M. 2009: 406-417
  • The case for RAMClouds: scalable high-performance storage entirely in DRAM ACM SIGOPS Operating Systems Review Ousterhout, J., Agrawal, P., Erickson, D., Kozyrakis, C., Leverich, J., Mazières, D. 2009; 43 (4)
  • Future Scaling of Processor-Memory Interfaces PROCEEDINGS OF THE CONFERENCE ON HIGH PERFORMANCE COMPUTING NETWORKING, STORAGE AND ANALYSIS Ahn, J. H., Jouppi, N. P., Kozyrakis, C., Leverich, J., Schreiber, R. S. 2009
  • Fast Memory Snapshot for Concurrent Programming without Synchronization ICS'09: PROCEEDINGS OF THE 2009 ACM SIGARCH INTERNATIONAL CONFERENCE ON SUPERCOMPUTING Chung, J., Baek, W., Kozyrakis, C. 2009: 117-125
  • Decoupling Dynamic Information Flow Tracking with a Dedicated Coprocessor 2009 IEEE/IFIP INTERNATIONAL CONFERENCE ON DEPENDABLE SYSTEMS & NETWORKS (DSN 2009) Kannan, H., Dalton, M., Kozyrakis, C. 2009: 105-114
  • Feedback-Directed Barrier Optimization in a Strongly Isolated STM ACM SIGPLAN NOTICES Bronson, N. G., Kozyrakis, C., Olukotun, K. 2009; 44 (1): 213-225
  • Phoenix Rebirth: Scalable MapReduce on a Large-Scale Shared-Memory System PROCEEDINGS OF THE 2009 IEEE INTERNATIONAL SYMPOSIUM ON WORKLOAD CHARACTERIZATION Yoo, R. M., Romano, A., Kozyrakis, C. 2009: 198-207
  • Comparative Evaluation of Memory Models for Chip Multiprocessors ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION Leverich, J., Arakida, H., Solomatnikov, A., Firoozshahian, A., Horowitz, M., Kozyrakis, C. 2008; 5 (3)
  • Transactional memory COMMUNICATIONS OF THE ACM Larus, J., Kozyrakis, C. 2008; 51 (7): 80-88
  • Improving Software Concurrency with Hardware-assisted Memory Snapshot SPAA'08: PROCEEDINGS OF THE TWENTIETH ANNUAL SYMPOSIUM ON PARALLELISM IN ALGORITHMS AND ARCHITECTURES Chung, J., Seo, J., Baek, W., Minh, C. C., McDonald, A., Kozyrakis, C., Olukotun, K. 2008: 363-363
  • ASeD: Availability, Security, and Debugging Support using Transactional Memory SPAA'08: PROCEEDINGS OF THE TWENTIETH ANNUAL SYMPOSIUM ON PARALLELISM IN ALGORITHMS AND ARCHITECTURES Chung, J., Baek, W., Bronson, N. G., Seo, J., Kozyrakis, C., Olukotun, K. 2008: 366-366
  • STAMP: Stanford Transactional Applications for Multi-Processing 2008 IEEE INTERNATIONAL SYMPOSIUM ON WORKLOAD CHARACTERIZATION Minh, C. C., Chung, J., Kozyrakis, C., Olukotun, K. 2008: 31-42
  • Thread-Safe Dynamic Binary Translation using Transactional Memory 2008 IEEE 14TH INTERNATIONAL SYMPOSIUM ON HIGH PEFORMANCE COMPUTER ARCHITECTURE Chung, J., Dalton, M., Kannan, H., Kozyrakis, C. 2008: 256-266
  • Models and metrics to enable energy-efficiency optimizations COMPUTER Rivoire, S., Shah, M. A., Ranganathan, P., Kozyrakis, C., Meza, J. 2007; 40 (12): 39-?
  • RAMP: Research accelerator for multiple processors IEEE MICRO Wawrzynek, J., Patterson, D., Oskin, M., Lu, S., Kozyrakis, C., Hoe, J. C., Chiou, D., Asanovic, K. 2007; 27 (2): 46-57
  • Towards Soft Optimization Techniques for Parallel Cognitive Applications SPAA'07: PROCEEDINGS OF THE NINETEENTH ANNUAL SYMPOSIUM ON PARALLELISM IN ALGORITHMS AND ARCHITECTURES Baek, W., Chung, J., Minh, C. C., Kozyrakis, C., Olukotun, K. 2007: 59-60
  • RAMP: Research Accelerator for Multiple Processors IEEE Micro Wawrzynek, J., Patterson, D., Oskin, M., Lu, S., Kozyrakis, C., Hoe, J. 2007; 27 (2)
  • Raksha: A Flexible Information Flow Architecture for Software Security ISCA'07: 34TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, CONFERENCE PROCEEDINGS Dalton, M., Kannan, H., Kozyrakis, C. 2007: 482-493
  • A Practical FPGA-based Framework for Novel CMP Research FPGA 2007: FIFTEENTH ACM/SIGDA INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE GATE ARRAYS Wee, S., Casper, J., Njoroge, N., Tesylar, Y., Ge, D., Kozyrakis, C., Olukotun, K. 2007: 116-125
  • Transactional Collection Classes PROCEEDINGS OF THE 2007 ACM SIGPLAN SYMPOSIUM ON PRINCIPLES AND PRACTICE OF PARALLEL PROGRAMMING PPOPP'07 Carlstrom, B. D., McDonald, A., Carbin, M., Kozyrakis, C., Olukotun, K. 2007: 56-67
  • ATLAS: A chip-multiprocessor with Transactional Memory support 2007 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3 Njoroge, N., Casper, J., Wee, S., Teslyar, Y., Ge, D., Kozyrakis, C., Olukotun, K. 2007: 3-8
  • Transactional memory: The hardware-software interface IEEE MICRO McDonald, A., Carlstrom, B. D., Chung, J., Minh, C. C., Chafi, H., Kozyrakis, C., Olukotun, K. 2007; 27 (1): 67-76
  • An Effective Hybrid Transactional Memory System with Strong Isolation Guarantees ISCA'07: 34TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, CONFERENCE PROCEEDINGS Minh, C. C., Trautmann, M., Chung, J., McDonald, A., Bronson, N., Casper, J., Kozyrakis, C., Olukotun, K. 2007: 69-80
  • Evaluating MapReduce for multi-core and multiprocessor systems THIRTEENTH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS Ranger, C., Raghuraman, R., Penmetsa, A., Bradski, G., Kozyrakis, C. 2007: 13-24
  • Comparing Memory Systems for Chip Multiprocessors ISCA'07: 34TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, CONFERENCE PROCEEDINGS Leverich, J., Arakida, H., Solomatnikov, A., Firoozshahian, A., Horowitz, M., Kozyrakis, C. 2007: 358-368
  • A scalable, non-blocking approach to transactional memory THIRTEENTH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS Chafi, H., Casper, J., Carlstrom, B. D., McDonald, A., Minh, C. C., Baek, W., Kozyrakis, C., Olukotun, K. 2007: 97-108
  • Register pointer architecture for efficient embedded processors 2007 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION, VOLS 1-3 Park, J., Park, S., Balfour, J. D., Black-Schaffer, D., Kozyrakis, C., Dally, W. J. 2007: 600-605
  • Tradeoffs in transactional memory virtualization ACM SIGPLAN NOTICES Chung, J., Minh, C. C., McDonald, A., Skare, T., Chafi, H., Carlstrom, B. D., Kozyrakis, C., Olukotun, K. 2006; 41 (11): 371-381
  • The ATOMO Sigma transactional programming language ACM SIGPLAN NOTICES Carlstrom, B. D., McDonald, A., Chafi, H., Chung, J., Minh, C. C., Kozyrakis, C., Olukotun, K. 2006; 41 (6): 1-13
  • Block Aware Instruction Set Architecture ACM Transactions on Architecture and Code Optimization Zmily, A., Kozyrakis, C. 2006; 3 (3): 327-357
  • Unlocking Concurrency: Multicore Programming with Transactional Memor ACM Queue Adl-Tabatabai, A., Kozyrakis, C., Saha, B. 2006; 4 (10)
  • Library-based Prefetching for Pointer Intensive Applications Online Technical Manuscript Malhotra, V., Kozyrakis, C. 2006
  • The common case transactional behavior of multithreaded programs TWELFTH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS Chung, J., Chafi, H., Minh, C. C., McDonald, A., Carlstrom, B., Kozyrakis, C., Olukotun, K. 2006: 271-282
  • Simultaneously improving code size, performance, and energy in embedded processors 2006 DESIGN AUTOMATION AND TEST IN EUROPE, VOLS 1-3, PROCEEDINGS Zmily, A., Kozyrakis, C. 2006: 222-227
  • Architectural semantics for practical Transactional Memory 33RD INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHTIECTURE, PROCEEDINGS McDonald, A., Chung, J., Carlstrom, B. D., Minh, C. C., Chafi, H., Kozyrakis, C., Olukotun, K. 2006: 53-64
  • Vector lane threading 2006 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING, PROCEEDINGS Rivoire, S., Schultz, R., Okuda, T., Kozyrakis, C. 2006: 55-62
  • Heuristics for profile-driven method-level speculative parallelization 2005 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSSING, PROCEEDINGS Whaley, J., Kozyrakis, C. 2005: 147-156
  • RAMP: Research Accelerator for Multiple Processors - A Community Vision for a Shared Experimental Parallel HW/SW Platform UC Berkeley Technical Report UCB/CSD-05-1412 Asanović, K. A., Chiou, D., Hoe, James, C., Kozyrakis, C., Lu, S., Oskin, M. 2005
  • Autonomic power management schemes for Internet servers and data centers GLOBECOM '05: IEEE GLOBAL TELECOMMUNICATIONS CONFERENCE, VOLS 1-6 Mastroleon, L., Bambos, N., Kozyrakis, C., Economou, D. 2005: 943-947
  • Improving instruction delivery with a block-aware ISA EURO-PAR 2005 PARALLEL PROCESSING, PROCEEDINGS Zmily, A., Killian, E., Kozyrakis, C. 2005; 3648: 530-539
  • Energy-efficient and high-performance instruction fetch using a block-aware ISA ISLPED '05: PROCEEDINGS OF THE 2005 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN Zmily, A., Kozyrakis, C. 2005: 36-41
  • Characterization of TCC on chip-multiprocessors PACT 2005: 14TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES McDonald, A., Chung, J. W., Chafi, H., Minh, C. C., Carlstrom, B. D., Hammond, L., Kozyrakis, C., Olukotun, K. 2005: 63-74
  • Transactional coherence and consistency: Simplifying parallel hardware and software IEEE MICRO Hammond, L., Carlstrom, B. D., Wong, V., Chen, M., Kozyrakis, C., Olukotun, K. 2004; 24 (6): 92-103
  • The stream virtual machine 13TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURE AND COMPILATION TECHNIQUES, PROCEEDINGS Labonte, F., Mattson, P., Thies, W., Buck, I., Kozyrakis, C., Horowitz, M. 2004: 267-277
  • Transactional memory coherence and consistency 31ST ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, PROCEEDINGS Hammond, L., Wong, V., Chen, M., Carlstrom, B. D., Davis, J. D., Hertzberg, B., Prabhu, M. K., Wijaya, H., Kozyrakis, C., Olukotun, K. 2004: 102-113
  • Scalable vector processors for embedded systems IEEE MICRO Kozyrakis, C. E., Patterson, D. A. 2003; 23 (6): 36-45
  • Overcoming the limitations of conventional vector processors 30TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE, PROCEEDINGS Kozyrakis, C., Patterson, D. 2003: 399-409
  • Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks 35TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO-35), PROCEEDINGS Kozyrakis, C., Patterson, D. 2002: 283-293
  • Vector IRAM: A Media-oriented Vector Processor with Embedded DRAM Technical Record of the 12th Hot Chips Conference Kozyrakis, C., Gebis, J., Martin, D., Williams, S., Mavroidis, I., Pope, S. 2000
  • A Media-Enhanced Vector Architecture for Embedded Memory Systems Technical Report UCB-CSD-99-1059, University of California at Berkeley Kozyrakis, C., Thesis, M., S. 1999
  • A new direction for computer architecture research COMPUTER Kozyrakis, C. E., Patterson, D. A. 1998; 31 (11): 24-?
  • Scalable Processors for the Billion Transistors Era: IRAM IEEE Computer Kozyrakis, C., Perissakis, S., Patterson, D., Yelick, K. 1997; 30 (9): 75-58
  • A Case for Intelligent DRAM: IRAM IEEE Micro Patterson, D., Anderson, T., Cardwell, N., Fromm, R., Keeton, K., Kozyrakis, C. 1997; 17 (2): 33-44
  • The Architecture, Operation, and Design of the Queue Management Block in the ATLAS I ATM Switch Technical Report FORTH-ICS/TR-172, Institute of Computer Science (ICS), Foundation for Research and Technology (FORTH), Heraklion, Crete, Greece Kozyrakis, C., Thesis, B., S. 1996

Conference Proceedings


  • Dynamic Management of TurboMode in Modern Multi-core Chips Patterson, D., Kozyrakis, C. 2014
  • Quasar: Resource-Efficient and QoS-Aware Cluster Management Delimitrou, C., Kozyrakis, C. 2014
  • Resource Efficienct Computing for Warehouse-scale Datacenters Kozyrakis, C. 2013
  • ZSim: Fast and Accurate Microarchitectural Simulation of Thousand-Core Systems Sanchez, D., Kozyrakis, C. 2013
  • iBench: Quantifying Interference for Datacenter Workloads Delimitrou, C., Kozyrakis, C. 2013
  • Convolution Engine: Balancing Efficiency and Flexibility in Specialized Computing Qadeer, W., Hameed, R., Shacham, O., Venkatesan, P., Kozyrakis, C., Horowitz, M. 2013
  • QoS-Aware Admission Control in Heterogeneous Datacenters Delimitrou, C., Bambos, N., Kozyrakis, C. 2013
  • Enhanced Concurrency Control with Transactional NACKs Baek, W., Yoo, R., Kozyrakis, C. 2013
  • Locality-Aware Task Management for Unstructured Parallelism: A Quantitative Limit Study Yoo, R., Hughes, C., Kim, C., Chen, Y., Kozyrakis, C. 2013
  • Dune: Safe User-level Access to Privileged CPU Features Belay, A., Bittau, A., Mashtizadeh, A., Terei, D., Mazie`res, D., Kozyrakis, C. 2012
  • ECHO: Recreating Network Traffic Maps for Datacenters of Tens of Thousands of Servers Delimitrou, C., Sanka, S., Kansal, A., Kozyrakis, C. 2012
  • Storage I/O Generation and Replay for Datacenter Applications Delimitrou, C., Sankar, S., Vaid, K., Kozyrakis, C. 2011
  • Time and Cost-Efficient Modeling and Generation of Large-Scale TPCC/TPCE/TPCH Delimitrou, C., Sankar, S., Khessib, B., Vaid, K., Kozyrakis, C. 2011
  • Phoenix++: Modular MapReduce for Shared-Memory Systems Talbot, J., Yoo, R., Kozyrakis, C. 2011
  • Dynamic Fine-Grain Scheduling of Pipeline Parallelism Sanchez, D., Lo, D., Yoo, R., Sugerman, J., Kozyrakis, C. 2011
  • Accurate Modeling and Generation of Storage I/O for Datacenter Workloads Delimitrou, C., Sankar, S., Vaid, K., Kozyrakis, C. 2011
  • FARM: A Prototyping Environment for Tightly-Coupled, Heterogeneous Architectures Oguntebi, T., Hong, S., Casper, J., Bronson, N., Kozyrakis, C., Olukotun, K. 2010
  • Making Nested Parallel Transactions Practical using Lightweight Hardware Support Baek, W., Bronson, N., Kozyrakis, C., Olukotun, K. 2010
  • EigenBench: A Simple Exploration Tool for Orthogonal TM Characteristics Hong, S., Oguntebi, T., Casper, J., Bronson, N., Kozyrakis, C., Olukotun, K. 2010
  • The ZCache: Decoupling Ways and Associativity Sanchez, D., Kozyrakis, C. 2010
  • Implementing and Evaluating a Model Checker for Transactional Memory Systems Baek, W., Bronson, N., Kozyrakis, C., Olukotun, K. 2010
  • Evaluating Bufferless Flow Control for On-Chip Networks Michelogiannakis, G., Sanchez, D., Dally, William, J., Kozyrakis, C. 2010
  • On the Energy (In)Efficiency of Hadoop Clusters Leverich, J., Kozyrakis, C. 2009
  • On the Energy (In)Efficiency of Hadoop Clusters Leverich, J., Kozyrakis, C. 2009
  • The Stanford Pervasive Parallelism Lab Kozyrakis, C., Olukotun, K. 2009
  • Energy Dumpster Diving Kazandjieva, M., Heller, B., Levis, P., Kozyrakis, C. 2009
  • Energy Dumpster Diving Kazandjieva, M., Heller, B., Levis, P., Kozyrakis, C. 2009
  • Nemesis: Preventing Authentication & Access Control Vulnerabilities in Web Applications Dalton, M., Kozyrakis, C., Zeldovich, N. 2009
  • Hardware Enforcement of Application Security Policies Zeldovich, N., Kannan, H., Dalton, M., Kozyrakis, C. 2008
  • A Comparison of High-Level Full-System Power Models Rivoire, S., Ranganathan, P., Kozyrakis, C. 2008
  • Real-World Buffer Overflow Protection for Userspace and Kernelspace Dalton, M., Kannan, H., Kozyrakis, C. 2008
  • The OpenTM Transactional Application Programming Interface Baek, W., Minh, C. C., Trautmann, M., Kozyrakis, C., Olukotun, K. 2007
  • A Low Power Front-end for Embedded Processors using a Block-aware Instruction Set Zmily, A., Kozyrakis, C. 2007
  • JouleSort: A Balanced Energy-Efficiency Benchmark Rivoire, S., Shah, Mehul, A., Ranganathan, P., Kozyrakis, C. 2007
  • Raksha: A Flexible Architecture for Software Security Kannan, H., Dalton, M., Kozyrakis, C. 2007
  • Executing Java programs with transactional memory Carlstrom, B. D., Chung, J., Chafi, H., McDonald, A., Minh, C. C., Hammond, L., Kozyrakis, C., Olukotun, K. ELSEVIER SCIENCE BV. 2006: 111-129
  • Parallelizing SPECjbb2000 with Transactional Memory Chung, J., Minh, C. C., Carlstrom, Brian, D., Kozyrakis, C. 2006
  • Early Release: Friend or Foe Skare, T., Kozyrakis, C. 2006
  • Building and Using the ATLAS Transactional Memory System Njoroge, N., Wee, S., Casper, J., Burdick, J., Teslyar, Y., Kozyrakis, C. 2006
  • Tutorial: Transactional Programming In A Multi-core Environment Adl-Tabatabai, A., Kozyrakis, C., Saha, B. 2006
  • CEARCH: Cognition Enabled Architecture Crago, S., McMahon, et al., J. 2006
  • The Software Stack for Transactional Memory: Challenges and Opportunities Calrstrom, Brian, D., Chung, J., Kozyrakis, C., Olukotun, K. 2006
  • Full-system Power Analysis and Modeling for Server Environments Economou, D., Rivoire, S., Kozyrakis, C., Ranganathan, P. 2006
  • Testing Implementations of Transactional Memory Manovit, C., Hangal, S., McDonald, A., Chafi, H., Kozyrakis, C., Olukotun, K. 2006
  • RAMP: Research Accelerator for Multiple Processors Arvind, D., Patterson, Asanovic, K., Chiou, D., Hoe, J., Kozyrakis, C., Lu, S. 2006
  • From Chaos to QoS: Case Studies in CMP Resource Management Kannan, H., Guo, F., Zhao, L., Illikkal, R., Iyer, R., Newell, D., Kozyrakis, C. 2006
  • Deconstructing Hardware Architectures for Security Dalton, M., Kannan, H., Kozyrakis, C. 2006
  • Transactional Execution of Java Programs Calrstrom, Brian, D., Chung, J., Chafi, H., McDonald, A., Hammond, C. M., Kozyrakis, C. 2005
  • TAPE: a Transactional Application Profiling Environment Chafi, H., McDonald, A., Minh, C. C., Chung, J., Carlstrom, B., Hammond, L., Kozyrakis, C. 2005
  • Programming with transactional coherence and consistency (TCC) Hammond, L., Carlstrom, B. D., Wong, V., Hertzberg, B., Chen, M., Kozyrakis, C., Olukotun, K. ASSOC COMPUTING MACHINERY. 2004: 1-13
  • VIRAM-1: A Media-Oriented Vector Processor with Embedded DRAM Gebis, J., William, S., Kozyrakis, C., Patterson, D. 2004
  • Transactional Memory Coherence and Consistency (TCC) Hammond, L., Wong, V., Chen, M., Hertzberg, B., Carlstrom, B., Prabhu, M., Kozyrakis, C. 2004
  • Stream Virtual Machine and Two-Level Compilation Model for Streaming Architectures and Languages Mattson, P., Lethin, R., Litvinov, V., Labonte, F., Buck, I., Kozyrakis, C. 2004
  • Hardware/compiler Codevelopment for an Embedded Media Processor Kozyrakis, C., Judd, D., Gebis, J., Williams, S., Patterson, D., Yelick, K. 2001
  • Lecture Notes in Computer Science edited by Chong, F., Kozyrakis, C., Oskin, M. 2001
  • Exploiting On-chip Memory Bandwidth in the VIRAM Compiler Judd, D., Yelick, K., Kozyrakis, C., Martin, D., Patterson, D. 2000
  • Explicitly Parallel Architectures for Memory Performance Enhancement Kozyrakis, C. 2000
  • Vector IRAM: A Media-oriented Vector Processor with Embedded DRAM Kozyrakis, C., Gebis, J., Martin, D., Williams, S., Mavroidis, I., Pope, S. 2000
  • High-Performance Architectures for Embedded Memory Systems Kozyrakis, C. 1999
  • High-Performance Architectures for Embedded Memory Systems Kozyrakis, C. 1998
  • Evaluation of Existing Architectures in IRAM Systems Bowman, N., Cardwell, N., Kozyrakis, C., Romer, C., Wang, H. 1997
  • Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control Kornaros, G., Kozyrakis, C., Vatsolaki, P., Katevenis, M. 1997
  • Intellingent RAM (IRAM): the Industrial Setting, Applications, and Architectures Patterson, D., Asanovic, K., Brown, A., Fromm, R., Golbus, J., Gribstad, B., Kozyrakis, C. 1997
  • Intelligent RAM (IRAM): Chips that Compute and Remember Patterson, D., Anderson, T., Cardwell, N., Fromm, R., Keeton, K., Kozyrakis, C. 1997
  • The Energy Efficiency of IRAM Architectures Fromm, R., Perissakis, S., Cardwell, N., Kozyrakis, C., McGaughy, B., Patterson, D. 1997